Posted by mulyanto on June 12, 2007
Some important JTAG notes.
80 82 84 87 94 97 99 101 VCC VCC FLEX_EXPAN_A PIN Assignment
79 81 83 86 88 95 98 100 VCC VCC UP1/UP2 Altera Board
TCK TDO TMS TDI
1 3 5 7 9 (JTAG PIN NUMBER)
2 4 6 8 10 (JTAG PIN NUMBER)
GND VCC GND
TCK is pin 1 JTAG and pin 2 PP or data(0), bit 0 register DATA
TMS is pin 5 JTAG and pin 3 PP or data(1), bit 1 register DATA
TDO is pin 3 JTAG and pin 11 PP or Busy, bit 7 register STATUS
TDI is pin 9 JTAG and pin 8 PP or data(6), bit 6 register DATA
Use register CONTROL 1 to enable SPP for byteblasterMV ( _outp(CONTROL,2) )
Use register CONTROL 2 to enable SPP for byteblasterII ( _outp(CONTROL,1) )
Bit Byte Value
0 1 TCK
1 2 TMS
2 4
3 8
4 16
5 32
6 64 TDI
7 128
If you want send TCK=1 then you have to assign parallel port by 00000001 = d’1.
If you want send TMS=1 then you have to assign parallel port by 00000010 = d’2.
If you want send TDI=1 then you have to assign parallel port by 01000000 = d’64.
Here is the example of c code for jtag
http://mulyantogoblog.files.wordpress.com/2007/06/jtag.pdf
Posted in Altera, C++ Code, Hardware | 1 Comment »
Posted by mulyanto on April 15, 2007

Either 0.1µF or 1µF capacitors may be used.
The V+ capacitor may be terminated to VCC or to GND.
R1N connected to pin 3 of DB9 connector, not pin 7. MAX232CPE from MAXIM can be use.
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Posted by mulyanto on April 10, 2007
First, you have to design verilog/vhdl for jtag interface and implement it on FPGA.
In my design, the design files consist of :
bt656.pdf (A.Mulyanto)
|–ddr_pll_cycloneii (Altera Core)
|–ddr2_iface (Altera Core)
|–ddr2_iface_example_driver (A.Mulyanto)
|–ddr2_write
|–ddr2_read
|–rst_generator (A.Mulyanto)
|–pll_hdtv (Altera Core)
|–tdi_filt (A.Mulyanto)
|–tms_filt (A.Mulyanto)
|–jtag_clk_filt (A.Mulyanto)
|–jtag_interface.pdf
(A.Mulyanto)
|–timer (A.Mulyanto)
|–packet_receiver.pdf (A.Mulyanto)
|–dp256×96 (Altera Core)
|–display_driver (A.Mulyanto)
|–char_rom (Altera Core)
|–ff_ddr8 (Altera Core)
|–SVGA (Xilinx Inc)
|–svga_defines (Xilinx Inc)
Here is the c code jtag.c (jtag-ddr2.pdf)
Dowload conio.pdf and convert it to conio.h
Put jtag.c and conio.h in the same directory, for example “C:\Cygwin\home\mul\c\jtag”
Run the gcc (in Cygwin bash):
gcc -Wall -mno-cygwin jtag.c -o jtag
don’t forget to put rgb0.txt, rgb1.txt, rgb2.txt and rgb3.txt in that directory.
run the allowio.exe (in Windows prompt) :
AllowIO.exe -a jtag.exe
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